Video coding apparatus and video coding method

ABSTRACT

A video coding apparatus including a dividing part that outputs the coding target picture divided for each coding unit (basic CU); a prediction processor that generates a prediction image by performing one of intra prediction and inter-screen prediction; a difference calculator that generates a difference image by calculating a difference between the generated prediction image and an image corresponding to the prediction image in the coding target picture; a residual coder that generates a residual coefficient by performing transform processing and quantization processing on the generated difference image; an integration unit that integrates a plurality of basic CUs included in an N×N-pixel region into one new CU, and a code string generator that generates a code string corresponding to the post-integration new CU by performing variable-length coding and arithmetic coding on coding information and the residual coefficient.

BACKGROUND 1. Field

The present disclosure relates to a video coding apparatus and a videocoding method for coding an input image while dividing the input imageinto blocks.

2. Description of the Related Art

Nowadays, unified treatment of all pieces of media information such asan image, a sound, and a text becomes general with the progress ofmultimedia application. Because a digitized image has a huge dataamount, an image information compression technology is required to storeand transmit the image. At the same time, standardization of thecompression technology is also required in order to mutually use thecompressed image data. For example, H.261, H.263, and H.264 of ITU-T(International Telecommunication Union Telecommunication StandardizationSector) and MPEG-1, MPEG-3, MPEG-4, and MPEG-4AVC of ISO/IEC(International Organization for Standardization) are well known as astandard for video compression technology. A standardization activity ofa next-generation video coding system called HEVC (High Efficiency VideoCoding) is currently progressed by a cooperation of ITU-T and ISO/IEC.

In video coding, each coding target picture is divided into blocks whichare coding units, and an information amount is compressed by reducingredundancies in temporal and spatial directions in each block. In intraprediction coding aimed at the reduction of the spatial redundancy, aprediction image is generated from pixel information on the surroundingalready-coded block to acquire a difference image between the obtainedprediction image and a coding target block. In inter-screen predictioncoding aimed at the reduction of the temporal redundancy, motiondetection and generation of a prediction image are performed by blockunit by referring to the picture in which the coding is alreadycompleted forward or rearward, and the difference image between theobtained prediction image and a coding target block is acquired.Transform processing such as a discrete cosine transform andquantization processing are performed on the obtained difference image,and a code string is generated using variable-length coding andarithmetic coding, thereby compressing the information amount.

FIG. 1 is a conceptual view illustrating a combination of block sizesdefined in the HEVC standard. In the HEVC (ITU-T H.265 (04/2013))standard, as illustrated in FIG. 1, any size can be selected and usedfrom four kinds of block sizes, namely, 64×64 pixels, 32×32 pixels,16×16 pixels, and 8×8 pixels as a coding unit (hereinafter, referred toas a “CU (Coding Unit)”).

For example, in the case that a CU size has 32×32 pixels, as illustratedin FIG. 1, any size can be selected and used from eight kinds of blocksizes such as 32×32 pixels, 16×32 pixels, and 16×16 pixels as aprediction unit (hereinafter, referred to as a “PU (Prediction Unit))that is of a unit obtained by dividing the CU. The PU generates aprediction image in the intra prediction coding and the inter-screenprediction coding. For example, a smaller block size is used in theimage in which motion of an imaging object is complicated, and a largerblock size is used in the image in which the motion of an imaging objectis simple, thereby achieving high coding efficiency.

For example, in the case that the CU size has 32×32 pixels, asillustrated in FIG. 1, any size can be selected and used from four kindsof block sizes of 32×32 pixels, 16×16 pixels, 8×8 pixels, and 4×4 pixelsas an transform unit (hereinafter, referred to as a “TU (TransformUnit)) that is of a unit obtained by dividing the CU. The TU is used inthe transform processing and the quantization processing. For example, asmaller block size is used in the image in which a characteristic variesin a fine range, and a larger block size is used in the image in whichthe characteristics are identical to each other in a wide range, therebyachieving the high coding efficiency.

SUMMARY

An object of the present disclosure is to provide a video codingapparatus that improves the coding efficiency without increasing aprocessing amount while suppressing code amounts of pieces of headerinformation on a CU layer and a PU layer.

According to one aspect of the present disclosure, a video codingapparatus codes a coding target picture according to a predeterminedcoding standard to generate a code string. The video coding apparatusincludes: a dividing part that outputs the coding target picture dividedfor each coding unit (basic CU); a prediction processor that generates aprediction image by performing one of intra prediction and inter-screenprediction in each prediction unit (basic PU) having a size less than orequal to that of the basic CU, the basic PU being a unit obtained bydividing the output basic CU into at least one; a difference calculatorthat generates a difference image by calculating a difference betweenthe generated prediction image and an image corresponding to theprediction image in the coding target picture; a residual coder thatgenerates a residual coefficient by performing transform processing andquantization processing on the generated difference image; anintegration unit that integrates a plurality of basic CUs included in anintegration region (N×N-pixel region) into one new CU, (1) whenpluralities of basic CUs and basic PUs belonging to the N×N-pixel regionhave an identical block size, and (2) when pieces of predictioninformation on the plurality of basic PUs belonging to the N×N-pixelregion are identical to each other; and a code string generator thatgenerates a code string corresponding to the post-integration new CU byperforming variable-length coding and arithmetic coding on codinginformation and the residual coefficient, the coding information beingset to the post-integration new CU, the residual coefficient relating tothe plurality of pre-integration basic CUs belonging to thepost-integration new CU.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a conceptual view illustrating a combination of block sizesdefined in an HEVC standard;

FIG. 2 is a block diagram illustrating a configuration of video codingapparatus 100 according to a first exemplary embodiment;

FIG. 3 is a conceptual view illustrating a combination of block sizes ofthe first exemplary embodiment;

FIG. 4 is a flowchart illustrating integration determination processingof the first exemplary embodiment;

FIG. 5A is a view illustrating the integration determination processingof the first exemplary embodiment;

FIG. 5B is a view illustrating the integration determination processingof the first exemplary embodiment;

FIG. 6 is a conceptual view illustrating each block size combinationthat emerges by performing the integration determination processing ofthe first exemplary embodiment;

FIG. 7 is a flowchart illustrating integration determination processingaccording to a second exemplary embodiment;

FIG. 8A is a view illustrating the integration determination processingof the second exemplary embodiment;

FIG. 8B is a view illustrating the integration determination processingof the second exemplary embodiment;

FIG. 9 is a conceptual view illustrating a condition of the integrationdetermination processing of the second exemplary embodiment;

FIG. 10 is a conceptual view illustrating each block size combinationthat emerges by performing the integration determination processing ofthe second exemplary embodiment;

FIG. 11 is a flowchart illustrating integration determination processingaccording to a third exemplary embodiment;

FIG. 12A is a view illustrating the integration determination processingof the third exemplary embodiment;

FIG. 12B is a view illustrating the integration determination processingof the third exemplary embodiment;

FIG. 12C is a view illustrating the integration determination processingof the third exemplary embodiment; and

FIG. 13 is a conceptual view illustrating each block size combinationthat emerges by performing the integration determination processing ofthe third exemplary embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, exemplary embodiments of the present disclosure will bedescribed in detail with reference to the drawings. However, thedetailed description beyond necessity is occasionally omitted. Forexample, the detailed description of the well-known item or theoverlapping description of the substantially same configuration isoccasionally omitted. This is because unnecessary redundancy of thefollowing description is avoided for the purpose of the easyunderstanding of those skilled in the art.

The accompanying drawings and the following description are provided inorder that those skilled in the art sufficiently understand the presentdisclosure, but the claims are not limited to the accompanying drawingsand the following description.

First Exemplary Embodiment

For example, video coding apparatus 100 according to a first exemplaryembodiment is embodied by a microprocessor incorporated in a videocamera, a digital camera, a video recorder, a mobile phone, a handheldterminal, and a personal computer. Video coding apparatus 100 of thefirst exemplary embodiment performs coding processing on video dataaccording to an HEVC standard for video compression. Based on pieces ofcoding information on a CU (Coding Unit) and a PU (Prediction Unit),video coding apparatus 100 according to the present disclosureintegrates the plurality of CUs into one CU, and provides one piece ofheader information to the post-integration CU. As a result, the codeamounts of the pieces of header information on the CU layer and PU layercan be suppressed, and the coding efficiency can be improved withoutincreasing the processing amount.

A configuration and operation of video coding apparatus 100 of the firstexemplary embodiment will be described with reference to the drawings.

(1-1. Configuration of Video Coding Apparatus)

The configuration of video coding apparatus 100 will be described below.FIG. 2 is a block diagram illustrating the configuration of video codingapparatus 100 of the first exemplary embodiment.

As illustrated in FIG. 2, video coding apparatus 100 includes picturememory 101, basic block dividing part 102, basic block unit processingloop part 111, integration determination part 107, and code stringgenerator 108. Video coding apparatus 100 also includes predictionresidual coder 103, prediction residual decoder 104, picture buffer 105,prediction processor 106, difference calculator 109, and additioncalculator 110 as basic block unit processing loop part 111. Videocoding apparatus 100 having the above configuration divides an imageinput by picture unit into basic blocks, performs the coding processingby divided basic block unit, and outputs a code string.

Each unit constituting video coding apparatus 100 will be describedbelow in detail.

An image signal is input into picture memory 101 by picture unit in theorder displayed on a display device. The input image signal is stored,by picture unit in the coding order, in picture memory 101. Whenreceiving a read command from basic block dividing part 102, picturememory 101 outputs a coding target picture that is of the input imagesignal concerning the read command to basic block dividing part 102.

Basic block dividing part 102 that is of the dividing part, divides thecoding target picture sequentially input from picture memory 101 foreach coding unit, and outputs the coding target picture. Basic blockdividing part 102 divides the coding target picture into the basicblocks that is of a basic unit of processing in basic block unitprocessing loop part 111. Video coding apparatus 100 limits a basicblock size to 16×16 pixels, which are smaller than 64×64 pixels and32×32 pixels. The 64×64 pixels, 32×32 pixels, and 16×16 pixels aredefined in the HEVC standard. The basic block includes at least one CUthat is of a coding unit defined in the HEVC standard. FIG. 3 is aconceptual view illustrating a combination of block sizes of the firstexemplary embodiment. As illustrated in a column of a “basic CU size” inFIG. 3, the basic CU size can take on a 16×16-pixel size and an8×8-pixel size with respect to the 16×16-pixel basic block. One CUhaving the 16×16-pixel size is included in the 16×16-pixel basic block.Four CUs having the 8×8-pixel size are included in the 16×16-pixel basicblock. Hereinafter, these CUs included in the basic block are referredto as a “basic CU”.

Basic block dividing part 102 selects a basic CU size and divides theinput coding target picture into the basic blocks. Generally, basicblock dividing part 102 selects the basic CU having a smaller size whenthe coding target picture has a complicated pixel configuration. On theother hand, basic block dividing part 102 selects the basic CU having alarger size when the coding target picture has a simple pixelconfiguration. The same holds true for the case that a part of the sizesof the basic CUs in FIG. 3 is not used or the case that the basic CUhaving the size, which is not illustrated in FIG. 3 but is less than orequal to the basic block size, is used.

Basic block dividing part 102 outputs the coding target picture dividedinto the basic blocks (in which the basic CU size is already selected)to prediction processor 106 and difference calculator 109.

Based on the coding target picture divided into the basic blockssequentially input from basic block dividing part 102, predictionprocessor 106 performs prediction processing on each basic block usingone of intra prediction and inter-screen prediction. Predictionprocessor 106 performs prediction processing on each PU (hereinafter,referred to as a “basic PU”) that is one of prediction units into whichthe basic CU is further divided. Specifically, as illustrated in thecolumn of a “basic PU size” in FIG. 3, the basic CU having the16×16-pixel size is divided into one of one 16×16-pixel basic PU, two16×8-pixel basic PUs, and two 8×16-pixel basic PUs. However, the16×8-pixel and 8×16-pixel basic PU sizes are used only when theinter-screen prediction is selected. On the other hand, the basic CUhaving the 8×8-pixel size is divided into one of one 8×8-pixel basic PU,two 8×4-pixel basic PUs or two 4×8-pixel basic PUs, and four 4×4-pixelbasic PUs. However, the 8×4-pixel and 4×8-pixel basic PU sizes are usedonly when the inter-screen prediction is selected. The 4×4-pixel basicPU size is used only when the intra prediction is selected. Generally,prediction processor 106 selects the basic PU having a smaller size whenthe input basic CU has the complicated pixel configuration. On the otherhand, prediction processor 106 selects the basic PU having a larger sizewhen the input basic CU has the simple pixel configuration. The sameholds true for the case that a part of the sizes of the basic PUs inFIG. 3 is not used or the case that the basic PU having the size, whichis not illustrated in FIG. 3 but is less than or equal to the basic CU,is used.

In the case that the intra prediction is used, prediction processor 106performs the prediction processing on the block in the coding targetpicture using a reconstructed image signal of an already-codedsurrounding block in the same coding target picture. As used herein, thereconstructed image signal means a signal generated by additioncalculator 110 (to be described later). Prediction processor 106performs the prediction processing by selecting one intra predictionmode of generating a prediction image having a highest similarity of thepixel configuration to that of the coding target block from a pluralityof intra prediction methods (intra prediction modes).

On the other hand, in the case that the inter-screen prediction is used,prediction processor 106 performs the prediction processing using thereconstructed image signal of another already-coded picture stored inpicture buffer 105. Specifically, prediction processor 106 searches aregion having the highest similarity of the pixel configuration to thatof the coding target block from a reconstructed image of anotheralready-coded picture. Prediction processor 106 fixes which one of thereconstructed images of the pictures is referred to (hereinafter,information on the picture to be referred to is referred to as“reference picture information”), and fixes how far the reconstructedimage to be referred to is deviated from a position corresponding to thecoding target block (hereinafter, information indicating a positiondeviation amount is referred to as “motion vector information”) in thereference picture, thereby generating the prediction image.

Difference calculator 109 generates a difference image signal that is ofa difference value between a basic-PU input image signal selected basedon the basic CU in the basic block input from basic block dividing part102 and a basic-PU prediction image signal input from predictionprocessor 106. Difference calculator 109 outputs the generateddifference image signal to prediction residual coder 103.

Prediction residual coder 103 that is of the residual coder performstransform processing on the difference image signal input fromdifference calculator 109, and performs quantization processing on antransform coefficient of each obtained frequency component. As a result,prediction residual coder 103 generates a residual coefficient signal.Prediction residual coder 103 performs the transform processing and thequantization processing in each TU (Transform Unit) (hereinafter,referred to as a “basic TU”) that is one of transform units into whichthe basic CU is further divided. Specifically, as illustrated in thecolumn of a “basic TU size” in FIG. 3, the basic CU having the16×16-pixel size is divided into one of one 16×16-pixel basic TU andfour 8×8-pixel basic TUs. On the other hand, the basic CU having the8×8-pixel size can be divided into one of one 8×8-pixel basic TU or four4×4-pixel basic TUs. In the example of FIG. 3, necessity of theprocessing of selecting the basic TU size is eliminated, because thebasic TU is uniquely allocated when the basic PU is fixed. Therefore,the processing amount can considerably be reduced. The same holds truefor the case that a part of the sizes of the basic TUs in FIG. 3 is notused or the case that the basic TU having the size, which is notillustrated in FIG. 3 but is less than or equal to the basic PU, isused.

In prediction residual decoder 104, the basic TU processed by predictionresidual coder 103 is set to the processing unit. Prediction residualdecoder 104 performs inverse quantization processing and inversetransform processing on the residual coefficient signal input fromprediction residual coder 103, thereby generating a reconstructeddifference image signal.

Addition calculator 110 generates the reconstructed image signal byadding the reconstructed difference image signal input from predictionresidual decoder 104 and the prediction image signal input fromprediction processor 106 by basic PU.

The reconstructed image signal input from addition calculator 110 isstored in picture buffer 105. The reconstructed image signal stored inpicture buffer 105 is referred to in the inter-screen predictionprocessing performed on a picture coded after the present coding targetpicture.

At time basic block unit processing loop part 111 completes a series ofpieces of processing performed on the plurality of basic blocks that areof the integration determination target, integration determination part107 acting as the integration unit determines whether the basic CUsbelonging to the plurality of basic blocks are integrated into oneintegrated coding unit (hereinafter, referred to as an “integrated CU”),and generates an integration determination result signal. That is,integration determination part 107 determines whether the plurality ofbasic CU belonging to an N×N-pixel (for example, 32×32-pixel) regionconstructed with the plurality of basic blocks are integrated into oneintegrated CU. Integration determination part 107 has a first operationmode in which the plurality of basic CUs are directly output to codestring generator 108 without integrating the basic CUs and a secondoperation mode in which the plurality of basic CUs belonging to theN×N-pixel region are integrated into one new CU before they are outputto code string generator 108. Integration determination part 107switchably performs the first operation mode and the second operationmode according to the integration determination result. That is,integration determination part 107 integrates the plurality of basic CUsincluded in the N×N-pixel region into one new CU, (1) when thepluralities of basic CUs and basic PUs belonging to the N×N-pixel regionhave the identical block size, and (2) when pieces of predictioninformation on the plurality of basic PUs belonging to the N×N-pixelregion are identical to each other.

Code string generator 108 generates a code string by performingvariable-length coding and arithmetic coding on the residual coefficientsignal input from prediction residual coder 103 by integrated CU orbasic CU and coding information signal necessary for processing ofdecoding other signals according to the integration determination resultsignal input from integration determination part 107. That is, codestring generator 108 generates the code string with respect to the newpost-integration CU by performing the variable-length coding and thearithmetic coding on the coding information set to the newpost-integration CU and the residual coefficient concerning theplurality of pre-integration basic CUs belonging to the newpost-integration CU. In the case that the integrated CU is output fromintegration determination part 107, the code string is generated withrespect to the integrated CU by performing the variable-length codingand the arithmetic coding on the coding information set to theintegrated CU and the residual coefficient concerning the plurality ofpre-integration basic CUs belonging to the integrated CU.

As described above, in video coding apparatus 100, the basic block sizeis limited to the 16×16 pixels. As illustrated in FIG. 3, selectablecombinations of the basic CUs, basic PUs, and basic TUs can be limitedto three sets when the intra prediction is selected, and the selectablecombinations can be limited to six sets when the inter-screen predictionis selected. Therefore, the processing amount necessary for theselection of the optimum combination in the series of pieces ofprocessing performed by basic block unit processing loop part 111 cansignificantly be reduced.

In the first exemplary embodiment, the basic block size is limited tothe 16×16 pixels. Alternatively, the basic block size is not limited,but the optimum combination may be selected from the combinations inFIG. 1 defined in the HEVC standard. However, in this case, theprocessing amount becomes huge compared with the case that the basicblock size is limited. Alternatively, the basic block size is notlimited to the 16×16 pixels, but the basic block size may be limited toother block sizes such as the 32×32 pixels. For example, in the casethat the basic block size is limited to the 32×32 pixels, the number ofoptions of the block sizes of the CU and PU belonging to the basic blocksize is increased to be expected to improve the coding efficiency. Onthe other hand, the processing amount necessary for the selection of theoptimum CU and PU block sizes is increased. Accordingly, the largerblock size is used as the basic block size in the video coding apparatusin which the increase of processing amount is acceptable. On the otherhand, the smaller block size is used as the basic block size in thevideo coding apparatus in which the increase of processing amount isunacceptable.

(1-2. Operation of Integration Determination Part)

An integration region including the plurality of basic blocks is definedin integration determination part 107 of the first exemplary embodiment.At the time basic block unit processing loop part 111 completes theseries of pieces of processing, integration determination part 107performs integration determination processing on all the basic blocksincluded in the integration region.

A method, performed by integration determination part 107, fordetermining whether the basic CUs belonging to the plurality of basicblocks are integrated into one integrated CU will specifically bedescribed with reference to FIGS. 4, 5A, and 5B. FIG. 4 is a flowchartillustrating the integration determination processing of the firstexemplary embodiment. FIGS. 5A and 5B are views illustrating theintegration determination processing of the first exemplary embodiment.FIG. 4 illustrates the processing in the case that the basic block hasthe 16×16-pixel size while the integration region has the 32×32-pixelsize. At this point, the integration region includes four basic blocks.As long as an integration region size is larger than the basic blocksize, a size except the 32×32 pixels may be used as the integrationregion size according to the basic block size.

Integration determination part 107 determines whether all the four basicblocks included in the integration region are constructed with the16×16-pixel basic CU and the 16×16-pixel basic PU (S301).

When the condition in S301 is not satisfied (NO in S301), the basic CUsin the integration region are not integrated as illustrated in FIG. 5A.

On the other hand, when the condition in S301 is satisfied (YES inS301), integration determination part 107 determines whether pieces ofprediction information on the four basic PUs in the integration regionare identical to one another (S302). Specifically, for the intraprediction, integration determination part 107 determines whether atleast the intra prediction modes of the four basic PUs in theintegration region are identical to one another. That is, integrationdetermination part 107 switches between the first operation mode and thesecond operation mode based on whether the intra prediction modes areidentical to one another as the prediction information, when all thebasic PUs included in the integration region are the intra prediction.On the other hand, for the inter-screen prediction, integrationdetermination part 107 determines whether at least pieces of motionvector information and pieces of reference picture information on thefour basic PUs in the integration region are identical to one another.That is, integration determination part 107 switches between the firstoperation mode and the second operation mode based on whether the piecesof motion vector information and pieces of reference picture informationare identical to one another as the prediction information, when all thebasic PUs included in the integration region are the inter-screenprediction.

When the condition in S302 is not satisfied (NO in S302), the basic CUsin the integration region are not integrated as illustrated in FIG. 5A.

On the other hand, when the condition in S302 is satisfied (YES inS302), integration determination part 107 integrates the four16×16-pixel basic CUs into the one 32×32-pixel integrated CU asillustrated in FIG. 5B (S303).

FIG. 6 is a conceptual view illustrating each block size combinationthat emerges by performing the integration determination processing ofthe first exemplary embodiment. These block sizes become variable-lengthcoding and arithmetic coding targets in code string generator 108. Whencompared with the example in FIG. 3, it is found that the integrated CUhaving the CU size of 32×32 pixels, the PU size of 32×32 pixels, and theTU size of 16×16 pixels is added by the integration determinationprocessing.

Thus, in video coding apparatus 100 of the first exemplary embodiment,integration determination part 107 integrates the plurality of basic CUsincluded in the integration region into one new CU, when all thepluralities of basic CUs and basic PUs belonging to the integrationregion (the N×N-pixel region constructed with the plurality of basicblocks) have the identical block size, and when pieces of predictioninformation on all the basic PUs included in the integration region areidentical to each other. The code string is generated based on thepost-integration new CU.

In the case that the integration processing in FIG. 4 is not performed,even if the basic PUs have the identical prediction information, it isnecessary to individually write the prediction information on each basicPU in the code string. Therefore, the code amounts of the pieces ofheader information on the CU layer and PU layer are wastefullygenerated. On the other hand, in the case that the integrationprocessing is performed, it is only necessary to write the integratedone piece of prediction information in the code string, so that the codeamounts of the pieces of header information on the CU layer and PU layercan be suppressed, and the coding efficiency can be improved withoutincreasing the processing amount.

Integration determination part 107 integrates only the CUs and the PUsin the integrated CU. On the other hand, integration determination part107 does not integrate the TUs. Therefore, it is not necessary toreconstruct the residual coefficient signal after the integration, butthe basic CU can be converted into the integrated CU only by changingthe pieces of header information on the CU layer and PU layer.

Second Exemplary Embodiment

Video coding apparatus 100 according to a second exemplary embodimentwill be described with reference to the drawings. Because theconfiguration of video coding apparatus 100 of the second exemplaryembodiment is similar to that of the first exemplary embodiment, thedescription is omitted.

Video coding apparatus 100 of the second exemplary embodiment differsfrom video coding apparatus 100 of the first exemplary embodiment in theintegration determination processing performed by integrationdetermination part 107.

FIG. 7 is a flowchart illustrating the integration determinationprocessing of the second exemplary embodiment. FIGS. 8A and 8B are viewsillustrating the integration determination processing of the secondexemplary embodiment. FIG. 7 illustrates the processing in the case thatthe basic block has the 16×16-pixel size while the integration regionhas the 32×32-pixel size. At this point, the integration region includesfour basic blocks.

Integration determination part 107 determines whether all the four basicblocks included in the integration region are constructed with the16×16-pixel basic CU and the 16×16-pixel basic PU (S301). When thecondition in S301 is not satisfied (NO in S301), the basic CUs in theintegration region are not integrated as illustrated in FIG. 8A. On theother hand, when the condition in S301 is satisfied (YES in S301),integration determination part 107 determines whether pieces ofprediction information only on the basic PUs constituting anintegratable combination of the four basic PUs in the integration regionare identical to each other (S502 in FIG. 7). The detailed determinationin S502 of FIG. 7 will be described with reference to FIG. 9.

FIG. 9 is a conceptual view illustrating a condition of the integrationdetermination processing of the second exemplary embodiment. Asillustrated in FIG. 9, in the case that the pieces of predictioninformation on the four basic PUs are identical to one another,integration determination part 107 integrates the four basic PUs intoone 32×32-pixel integrated PU. In the case that the pieces of predictioninformation on two sets of basic PUs horizontally adjacent to each otherare identical to each other although the pieces of predictioninformation on the four basic PUs are different from one another,integration determination part 107 integrates the two basic PUs on theupper side into the integrated PU having the 32×16 pixels, andintegrates the two basic PUs on the lower side into the integrated PUhaving the 32×16 pixels. In the case that the pieces of predictioninformation on two sets of basic PUs vertically adjacent to each otherare identical to each other although the pieces of predictioninformation on the four basic PUs are different from one another,integration determination part 107 integrates the two basic PUs on theleft side into the integrated PU having the 16×32 pixels, and integratesthe two basic PUs on the right side into the integrated PU having the16×32 pixels. The 32×16-pixel integrated PU and the 16×32-pixelintegrated PU can be selected only for the inter-screen prediction, andonly the 32×32-pixel integrated PU can be selected for the intraprediction.

In the integration determination processing of the second exemplaryembodiment, the plurality of basic PUs included in the integrationregion (N×N-pixel region) are integrated into one new PU, when theplurality of basic PUs belonging to the integration region are dividedinto groups each of which is constructed with two basic PUs adjacent toeach other, and when the pieces of prediction information on the basicPUs belonging to each group are identical to each other. In this case,integration determination part 107 integrates the four 16×16-pixel basicCUs into the one 32×32-pixel integrated CU as illustrated in FIG. 8B(S303 in FIG. 7).

FIG. 10 is a conceptual view illustrating each block size combinationthat emerges by performing the integration determination processing ofthe second exemplary embodiment. These block sizes becomevariable-length coding and arithmetic coding targets in code stringgenerator 108. When compared with the example in FIG. 3, it is foundthat the integrated CU having the CU size of 32×32 pixels, the PU sizeof 32×32 pixels, and the TU size of 16×16 pixels and the integrated CUhaving the CU size of 32×32 pixels, the PU size of 32×16 pixels or 16×32pixels, and the TU size of 16×16 pixels are added by the integrationdetermination processing.

In video coding apparatus 100 of the second exemplary embodiment,integration determination part 107 integrates the plurality of basic CUsincluded in the integration region (N×N-pixel region) into one new CU,when the plurality of basic PUs belonging to the integration region aredivided into groups of two basic PUs adjacent to each other, and whenthe pieces of prediction information on the basic PUs belonging to eachgroup are identical to each other. The code string is generated based onthe post-integration new CU.

For example, integration determination part 107 integrates the pluralityof basic CUs included in the integration region (N×N-pixel region) intoone new CU, when the pieces of prediction information on all the basicPUs included in an upper half region in the integration region areidentical to each other, and when the pieces of prediction informationon all the basic PUs included in a lower half region in the integrationregion are identical to each other. Alternatively, integrationdetermination part 107 integrates the plurality of basic CUs included inthe integration region (N×N-pixel region) into one new CU, when thepieces of prediction information on all the basic PUs included in a halfregion on the left side in the integration region are identical to eachother, and when the pieces of prediction information on all the basicPUs included in a half region on the right side in the integrationregion are identical to each other.

In the integration processing of the first exemplary embodiment, thefour basic CUs are integrated into the integrated CU only when all thepieces of prediction information on the basic PUs are identical to oneanother. On the other hand, in the integration processing of the secondexemplary embodiment, the basic CUs are integrated into the integratedCU even when the pieces of prediction information on the two sets ofbasic PUs are identical to each other, so that the more basic CUs can beintegrated. Therefore, the code amounts of the pieces of headerinformation on the CU layer and PU layer can further be suppressed, andthe coding efficiency can be improved without increasing the processingamount.

Integration determination part 107 integrates only the CUs and the PUsin the integrated CU. On the other hand, integration determination part107 does not integrate the TUs. Therefore, it is not necessary toreconstruct the residual coefficient signal after the integration, butthe basic CU can be converted into the integrated CU only by changingthe pieces of header information on the CU layer and PU layer.

Third Exemplary Embodiment

Video coding apparatus 100 according to a third exemplary embodimentwill be described with reference to the drawings. Because theconfiguration of video coding apparatus 100 of the third exemplaryembodiment is similar to that of the first exemplary embodiment, thedescription is omitted.

Video coding apparatus 100 of the third exemplary embodiment differsfrom video coding apparatus 100 of the first and second exemplaryembodiments in the integration determination processing performed byintegration determination part 107.

In integration determination part 107 of the third exemplary embodiment,a two-stage integration region of integration region 1 and integrationregion 2 is defined as the integration region including the plurality ofbasic blocks. At the time basic block unit processing loop part 111completes the series of pieces of processing, integration determinationpart 107 performs integration determination processing on all the basicblocks included in the integration region.

A method, performed by integration determination part 107, fordetermining whether the basic CUs belonging to the plurality of basicblocks are integrated into one integrated CU will specifically bedescribed with reference to FIGS. 11, 12A, 12B, and 12C. FIG. 11 is aflowchart illustrating the integration determination processing of thethird exemplary embodiment. FIGS. 12A, 12B, and 12C are viewsillustrating the integration determination processing of the thirdexemplary embodiment. FIG. 11 illustrates the processing in the casethat the basic block has the 16×16-pixel size, that integration region 1has the 32×32-pixel size, and that integration region 2 has the64×64-pixel size. Integration region 2 includes integration region 1. Atthis point, integration region 1 includes four basic blocks. Integrationregion 2 includes four integration regions 1. That is, integrationregion 2 includes 16 basic blocks. As long as the integration regionsize is larger than the basic block size, a size except the 32×32 pixelsand 64×64 pixels may be used as the integration region size according tothe basic block size.

Integration determination part 107 determines whether all the four basicblocks included in integration region 1 are constructed with the16×16-pixel basic CU and the 16×16-pixel basic PU (S801).

When the condition in S801 is not satisfied (NO in S801), the basic CUsin integration region 1 are not integrated as illustrated in FIG. 12A.

On the other hand, when the condition in S801 is satisfied (YES inS801), integration determination part 107 determines whether pieces ofprediction information on the four basic PUs in integration region 1 areidentical to one another (S802). Specifically, for the intra prediction,integration determination part 107 determines whether at least the intraprediction modes of the four basic PUs in integration region 1 areidentical to one another. On the other hand, for the inter-screenprediction, integration determination part 107 determines whether atleast the pieces of motion vector information and pieces of referencepicture information on the four basic PUs in integration region 1 areidentical to one another.

When the condition in S802 is not satisfied (NO in S802), the basic CUsin integration region 1 are not integrated as illustrated in FIG. 12A.

On the other hand, when the condition in S802 is satisfied (YES inS802), integration determination part 107 integrates the four16×16-pixel basic CUs into the one 32×32-pixel integrated CU 1 (S803).

Integration determination part 107 determines whether a series of piecesof processing in S801 to S803 is performed on all four integrationregions 1 belonging to integration region 2 (S804). That is, when theseries of pieces of processing in S801 to S803 is not completed withrespect to all integration regions 1 in integration region 2 (NO inS804), integration determination part 107 performs the series of piecesof processing in S801 to S803 on unprocessed integration region 1. As aresult, in the case that the integration processing is not performed onany integration region 1, the 16 basic CUs in integration region 2 arenot integrated as illustrated in FIG. 12A. On the other hand, in thecase that only a part of four integration regions 1 is integrated, onlysome basic CUs in integration region 2 are integrated into 32×32-pixelintegrated CU 1 as illustrated in FIG. 12B.

When the series of pieces of processing in S801 to S803 is completedwith respect to all integration regions 1 in integration region 2 (YESin S804), integration determination part 107 determines whether all thebasic CUs are integrated into integrated CU 1 with respect to fourintegration regions 1 belonging to integration region 2 (S805).

When the condition in S805 is not satisfied (NO in S805), integrationdetermination part 107 ends the integration determination processing.

When the condition in S805 is satisfied (YES in S805), integrationdetermination part 107 determines whether the pieces of predictioninformation on the four integrated PUs 1 in integration region 2 areidentical to one another (S806).

When the condition in S806 is not satisfied (NO in S806), integrationdetermination part 107 ends the integration determination processing.

When the condition in S806 is satisfied (YES in S806), integrationdetermination part 107 further integrates four 32×32-pixel integratedCUs 1 into one 64×64-pixel integrated CU 2 as illustrated in FIG. 12C(S807). Video coding apparatus 100 limits the basic block size to 16×16pixels, which are smaller than 64×64 pixels and 32×32 pixels. The 64×64pixels, 32×32 pixels, and 16×16 pixels are defined in the HEVC standard.Therefore, the integration into 32×32-pixel integrated CU 1 and theintegration into 64×64-pixel integrated CU 2 can be achieved.

FIG. 13 is a conceptual view illustrating each block size combinationthat emerges by performing the integration determination processing ofthe third exemplary embodiment. These block sizes become variable-lengthcoding and arithmetic coding targets in code string generator 108. Whencompared with the example in FIG. 3, it is found that the integrated CU1 having the CU size of 32×32 pixels, the PU size of 32×32 pixels, andthe TU size of 16×16 pixels and the integrated CU 2 having the CU sizeof 64×64 pixels, the PU size of 64×64 pixels, and the TU size of 16×16pixels are added by the integration determination processing.

Thus, in video coding apparatus 100 of the third exemplary embodiment,integration determination part 107 integrates the plurality of basic CUsincluded in the integration region 1 into one new integrated CU 1, whenall the pluralities of basic CUs and basic PUs belonging to integrationregion 1 (the N×N-pixel region constructed with the plurality of basicblocks) have the identical block size, and when the pieces of predictioninformation on all the basic PUs included in integration region 1 areidentical to one another. Integration determination part 107 alsointegrates the plurality of basic CUs included in integration region 2into one new integrated CU 2, when all the basic CUs in integrationregion 2 (the region constructed with the plurality of integrationregions 1) are integrated into integrated CU 1, and when the pieces ofprediction information on all the integrated PUs 1 in integration region2 are identical to one another. The code string is generated based onthe post-integration new CU.

In the integration processing of the first exemplary embodiment, onlyfour basic CUs are integrated at a maximum. On the other hand, in theintegration processing of the third exemplary embodiment, theintegration is performed up to 16 basic CUs, so that the more basic CUscan be integrated into one CU. Therefore, the code amounts of the piecesof header information on the CU layer and PU layer can further besuppressed, and the coding efficiency can be improved without increasingthe processing amount.

Integration determination part 107 integrates only the CUs and the PUsin integrated CU 1 and integrated CU 2. On the other hand, integrationdetermination part 107 does not integrate the TUs. Therefore, it is notnecessary to reconstruct the residual coefficient signal after theintegration, but the basic CU can be converted into integrated CU 1 andintegrated CU 2 only by changing the pieces of header information on theCU layer and PU layer.

OTHER EXEMPLARY EMBODIMENTS

By way of example, the first to third exemplary embodiments aredescribed above as the technology disclosed in the present disclosure.However, the technology disclosed in the present disclosure is notlimited to the first to third exemplary embodiments, but can be appliedto exemplary embodiments in which modifications, replacements,additions, and omission are performed. A new exemplary embodiment can bemade by a combination of constituents described in the first to thirdexemplary embodiments.

Other exemplary embodiments will be described below.

The integration determination processing of each of the first to thirdexemplary embodiments is not limited to the individual use. That is, inthe integration determination processing of each of the first to thirdexemplary embodiments, some of the plurality of pieces of processing maybe combined and used. For example, in the flowchart of the thirdexemplary embodiment in FIG. 11, one of or both Steps S802 and S805 maybe replaced with Step S502 in the flowchart of the second exemplaryembodiment in FIG. 7.

A program having a function equivalent to each part included in videocoding apparatus 100 of the first to third exemplary embodiments may berecorded in a recording medium such as a flexible disk. Therefore, thepieces of processing in the first to third exemplary embodiments caneasily be performed by an independent computer system. The recordingmedium is not limited to the flexible disk, but any recording mediumsuch as an optical disk, an IC card, and a ROM cassette may be used aslong as the program is recorded in the recording medium.

The function equivalent to each part included in video coding apparatus100 of the first to third exemplary embodiments may be implemented as anLSI that is of an integrated circuit. A part of or all the parts may beintegrated into one chip. The LSI is also called an IC, a system LSI, asuper LSI, and an ultra LSI depending on an integration level.

The integrated circuit technique is not limited to the LSI, but thefunction may be implemented by a dedicated circuit or a general-purposeprocessor. An FPGA (Field Programmable Gate Array) that can beprogrammed after the production of the LSI or a reconfigurable processorthat can reconfigure connection or setting of a circuit cell in the LSImay be used.

When an integrated circuit technology that replaces the LSI appears by aprogress of a semiconductor technology or another derived technology,the functional block may be integrated using the integrated circuittechnology that replaces the LSI.

Because the first to third exemplary embodiments are described only inorder to illustrate the technology of the present disclosure, variouschanges, replacements, additions, and omissions can be made within theclaims and the range equivalent to the claims.

The present disclosure can be applied to the video coding apparatus thatcodes each picture constituting the input image and outputs the pictureas the video coding data. For example, the present disclosure can beapplied to a video camera, a digital camera, a video recorder, a mobilephone, a handheld terminal, and a personal computer.

1-12. (canceled)
 13. A video coding apparatus that codes a currentpicture to generate a code string, the video coding apparatuscomprising: a block practitioner which, in operation, divides thecurrent picture into a plurality of blocks, the plurality of blocksincluding a first block and a second block; a residual coder which, inoperation, generates a residual coefficient by calculating a differencebetween a prediction image which is generated for each of the pluralityof blocks and the current picture; and a code string generator which, inoperation, generates the code string based on the residual coefficient,wherein: the code string generator provides a common header informationto both the first block and the second block, when a predictioninformation of the first block is the same as a prediction informationof the second block, and the code string generator provides a predictioninformation of the first block as a header information of the firstblock to the first block and provides a prediction information of thesecond block as a header information of the second block to the secondblock, when the prediction information of the first block is differentfrom the prediction information of the second block.
 14. A decodingmethod for decoding an image, on a block-by-block basis, from a codedstream, the decoding method comprising: determining, for a first block,whether a common prediction information or a block predictioninformation is used for generating a prediction image for the firstblock; generating, when the first block is included in a group unit thatis bigger than the first block, a prediction image corresponding to thefirst block using the common prediction information, the group unitincluding at least the first block and a second block, the commonprediction information being used for all blocks included in the groupunit; generating, when the first block is not included in the groupunit, a prediction image corresponding to the first block using theblock prediction information included in the first block; and generatinga decoded image corresponding to the first block using the predictionimage and a residual coefficient, the residual coefficient beingincluded in the first block regardless of whether or not the first blockis included in the group unit.
 15. A decoding apparatus for decoding animage, on a block-by-block basis, from a coded stream, the decodingapparatus comprising: a processor; and a non-transitory memory havingstored thereon executable instructions, which when executed, cause theprocessor to perform: reading a first information corresponding to aquantization parameter, the first information being used for a pluralityof blocks included in a picture; determining, using a second informationof a current picture including a current block and a third informationof the current block included in the current picture, whether or not afourth information corresponding to a quantization parameter of acurrent unit is used for the current block, the second information beingan information on a picture-by-picture basis and the third informationnot being an information on a picture-by-picture basis; and decoding,when the fourth information is determined to be used for the currentblock, the current block by using the first information and the fourthinformation, wherein the fourth information is used for all of aplurality of blocks included in the current unit.